package hardcaml

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package hardcaml
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type comb = Bits.t
type t = comb X.t
val sexp_of_t : comb X.t -> Sexplib0.Sexp.t
val assert_widths : comb X.t -> Base.unit

Raise if the widths of t do not match those specified in the interface.

val validate : comb X.t -> Base.unit

Checks the port widths of the signals in the interface. Raises if they mismatch.

val of_int : Base.int -> comb X.t

Each field is set to the constant integer value provided.

val pack : ?rev:Base.bool -> comb X.t -> comb

Pack interface into a vector.

val unpack : ?rev:Base.bool -> comb -> comb X.t

Unpack interface from a vector.

val mux : comb -> comb X.t Base.list -> comb X.t

Multiplex a list of interfaces.

val mux2 : comb -> comb X.t -> comb X.t -> comb X.t
val concat : comb X.t Base.list -> comb X.t

Concatenate a list of interfaces.

val priority_select_with_default : ((comb, comb X.t) Comb.with_valid2 Base.list -> default:comb X.t -> comb X.t) Comb.optional_branching_factor
val onehot_select : ((comb, comb X.t) Comb.with_valid2 Base.list -> comb X.t) Comb.optional_branching_factor
val widths : t -> Base.int X.t

Actual bit widths of each field.

val of_ints : Base.int X.t -> t

consts c sets each field to the integer value in c using the declared field bit width.

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