package hardcaml

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Module
Module type
Parameter
Class
Class type
val value : Always.Variable.t t -> Signal.t t
val reg : ?enable:Signal.t -> Reg_spec.t -> Always.Variable.t t
val wire : (Base.int -> Signal.t) -> Always.Variable.t t
val apply_names : ?prefix:Base.string -> ?suffix:Base.string -> ?naming_op:(Signal.t -> Base.string -> Signal.t) -> Always.Variable.t t -> Base.unit
val match_ : ?default:Always.t Base.list -> Signal.t t -> (Cases.t * Always.t Base.list) Base.list -> Always.t

Performs a "pattern match" on a Signal.t t, and "executes" the branch that matches the signal value. Semantics similar to switch in verilog.

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