package hardcaml

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package hardcaml
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Module
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Class
Class type
val bit : (Base.bool -> t) Variantslib.Variant.t
val bit_vector : (Logic.Bit_vector.t -> t) Variantslib.Variant.t
val bool : (Base.bool -> t) Variantslib.Variant.t
val int : (Base.int -> t) Variantslib.Variant.t
val real : (Base.float -> t) Variantslib.Variant.t
val std_logic : (Logic.Std_logic.t -> t) Variantslib.Variant.t
val std_logic_vector : (Logic.Std_logic_vector.t -> t) Variantslib.Variant.t
val std_ulogic : (Logic.Std_logic.t -> t) Variantslib.Variant.t
val std_ulogic_vector : (Logic.Std_logic_vector.t -> t) Variantslib.Variant.t
val string : (Base.string -> t) Variantslib.Variant.t
val fold : init:'acc__0 -> bit:('acc__0 -> (Base.bool -> t) Variantslib.Variant.t -> 'acc__1) -> bit_vector: ('acc__1 -> (Logic.Bit_vector.t -> t) Variantslib.Variant.t -> 'acc__2) -> bool:('acc__2 -> (Base.bool -> t) Variantslib.Variant.t -> 'acc__3) -> int:('acc__3 -> (Base.int -> t) Variantslib.Variant.t -> 'acc__4) -> real:('acc__4 -> (Base.float -> t) Variantslib.Variant.t -> 'acc__5) -> std_logic: ('acc__5 -> (Logic.Std_logic.t -> t) Variantslib.Variant.t -> 'acc__6) -> std_logic_vector: ('acc__6 -> (Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> 'acc__7) -> std_ulogic: ('acc__7 -> (Logic.Std_logic.t -> t) Variantslib.Variant.t -> 'acc__8) -> std_ulogic_vector: ('acc__8 -> (Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> 'acc__9) -> string:('acc__9 -> (Base.string -> t) Variantslib.Variant.t -> 'acc__10) -> 'acc__10
val iter : bit:((Base.bool -> t) Variantslib.Variant.t -> Base.unit) -> bit_vector:((Logic.Bit_vector.t -> t) Variantslib.Variant.t -> Base.unit) -> bool:((Base.bool -> t) Variantslib.Variant.t -> Base.unit) -> int:((Base.int -> t) Variantslib.Variant.t -> Base.unit) -> real:((Base.float -> t) Variantslib.Variant.t -> Base.unit) -> std_logic:((Logic.Std_logic.t -> t) Variantslib.Variant.t -> Base.unit) -> std_logic_vector: ((Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> Base.unit) -> std_ulogic:((Logic.Std_logic.t -> t) Variantslib.Variant.t -> Base.unit) -> std_ulogic_vector: ((Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> Base.unit) -> string:((Base.string -> t) Variantslib.Variant.t -> Base.unit) -> Base.unit
val map : t -> bit:((Base.bool -> t) Variantslib.Variant.t -> Base.bool -> 'result__) -> bit_vector: ((Logic.Bit_vector.t -> t) Variantslib.Variant.t -> Logic.Bit_vector.t -> 'result__) -> bool:((Base.bool -> t) Variantslib.Variant.t -> Base.bool -> 'result__) -> int:((Base.int -> t) Variantslib.Variant.t -> Base.int -> 'result__) -> real:((Base.float -> t) Variantslib.Variant.t -> Base.float -> 'result__) -> std_logic: ((Logic.Std_logic.t -> t) Variantslib.Variant.t -> Logic.Std_logic.t -> 'result__) -> std_logic_vector: ((Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> Logic.Std_logic_vector.t -> 'result__) -> std_ulogic: ((Logic.Std_logic.t -> t) Variantslib.Variant.t -> Logic.Std_logic.t -> 'result__) -> std_ulogic_vector: ((Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> Logic.Std_logic_vector.t -> 'result__) -> string:((Base.string -> t) Variantslib.Variant.t -> Base.string -> 'result__) -> 'result__
val make_matcher : bit: ((Base.bool -> t) Variantslib.Variant.t -> 'acc__0 -> (Base.bool -> 'result__) * 'acc__1) -> bit_vector: ((Logic.Bit_vector.t -> t) Variantslib.Variant.t -> 'acc__1 -> (Logic.Bit_vector.t -> 'result__) * 'acc__2) -> bool: ((Base.bool -> t) Variantslib.Variant.t -> 'acc__2 -> (Base.bool -> 'result__) * 'acc__3) -> int: ((Base.int -> t) Variantslib.Variant.t -> 'acc__3 -> (Base.int -> 'result__) * 'acc__4) -> real: ((Base.float -> t) Variantslib.Variant.t -> 'acc__4 -> (Base.float -> 'result__) * 'acc__5) -> std_logic: ((Logic.Std_logic.t -> t) Variantslib.Variant.t -> 'acc__5 -> (Logic.Std_logic.t -> 'result__) * 'acc__6) -> std_logic_vector: ((Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> 'acc__6 -> (Logic.Std_logic_vector.t -> 'result__) * 'acc__7) -> std_ulogic: ((Logic.Std_logic.t -> t) Variantslib.Variant.t -> 'acc__7 -> (Logic.Std_logic.t -> 'result__) * 'acc__8) -> std_ulogic_vector: ((Logic.Std_logic_vector.t -> t) Variantslib.Variant.t -> 'acc__8 -> (Logic.Std_logic_vector.t -> 'result__) * 'acc__9) -> string: ((Base.string -> t) Variantslib.Variant.t -> 'acc__9 -> (Base.string -> 'result__) * 'acc__10) -> 'acc__0 -> (t -> 'result__) * 'acc__10
val to_rank : t -> Base.int
val to_name : t -> Base.string
val descriptions : (Base.string * Base.int) Base.list
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