package hardcaml

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package hardcaml
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Allow a hardcaml circuit to be defined as a hierarchy of modules, rather than just a single flat module.

module With_interface (I : Interface.S) (O : Interface.S) : sig ... end
module In_scope (I : Interface.S) (O : Interface.S) : sig ... end

Support for hierarchically structured Hardcaml designs. We extend the standard Interface.Create_fn pattern so that the creation function also takes a Scope.t argument. This allows scoping of signal naming and automatic recording of the design in a Circuit_database.t. Top level options allow construction of a flat or modular design as required for simulation or syntheis.

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