package hardcaml

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Class type

Parameters

module SIM : Simulator

Signature

val init_sim : (unit -> unit) -> (string * int) list -> Unix.file_descr * (string * (int * int)) list
val make_sim_obj : server:Unix.file_descr -> clocks:(string * int) list -> resets:(string * int) list -> inputs:(string * int) list -> outputs:(string * int) list -> nets:(string * (int * int)) list -> Cyclesim.t_port_list
val make : ?dump_file:string -> ?opts:string -> Circuit.t -> Cyclesim.t_port_list

create simulator from hardcaml circuit

val load : ?opts:string -> clocks:(string * int) list -> resets:(string * int) list -> inputs:(string * int) list -> outputs:(string * int) list -> string -> Cyclesim.t_port_list

load icarus vvp simulation

module With_interface (I : Interface.S) (O : Interface.S) : sig ... end
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