package hardcaml_xilinx

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Library
Module
Module type
Parameter
Class
Class type
module type Combinational_primitives = sig ... end
module type Sequential_primitives = sig ... end
module Lut_equation : sig ... end

Allow expressions to generate LUT init values

Hardcaml based models of Xilinx primitives

Unisim library based Xilinx primitives

module type Xilinx_primitives = sig ... end
module type Lut_size = sig ... end
module Lut4 : Lut_size
module Lut6 : Lut_size
module Make_sequential (Synth : Xilinx_primitives with type t = Hardcaml.Signal.t) : sig ... end