package diffast-langs-verilog

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include module type of struct include Ls.TimingCheck end
type t = Verilog_parsing.Labels.TimingCheck.t =
  1. | Setup
  2. | Hold
  3. | Recovery
  4. | Removal
  5. | Skew
  6. | Setuphold
  7. | Recrem
  8. | Timeskew
  9. | Fullskew
  10. | Period
  11. | Width
  12. | Nochange
  13. | Anonymous
val to_string : t -> string
val to_simple_string : t -> string
val get_name : t -> string
val to_tag : t -> string * 'a list
val anonymize : t -> t
val to_short_string : t -> string
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