package hardcaml_of_verilog

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module Parameter : sig ... end
module Parameters : sig ... end
module Define_value : sig ... end
module Define : sig ... end
module Defines : sig ... end
module Module : sig ... end
type t
include Sexplib0.Sexpable.S with type t := t
val t_of_sexp : Sexplib0__.Sexp.t -> t
val sexp_of_t : t -> Sexplib0__.Sexp.t
val create : ?defines:Defines.t -> top:Module.t -> Base.unit -> t
val defines : t -> Defines.t
val top : t -> Module.t
val top_name : t -> Base.string

Name of top level module

val override_parameters : t -> Parameters.t -> t

Override the parameters of the top level module

val map_paths : t -> f:(Base.string -> Base.string) -> t

map_paths t ~f applies f to each modules path

module type Crunched = sig ... end
val map_crunched_paths : ?delete_temp_files:Base.bool -> (module Crunched) Base.list -> t -> t

Read verilog files from ocaml-cruched file system(s) and extract to temp files.

module type Embedded_files = sig ... end
val map_embed_file_paths : ?delete_temp_files:Base.bool -> (module Embedded_files) Base.list -> t -> t

Read verilog files from embed_file file system(s) and extract to temp files.

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