diffast-langs-verilog-parsing 0.1.1

Parameters

module Stat : STATE_T

Signature

val lexing_pos_start : Sedlexing.lexbuf -> Lexing.position

val lexing_pos_end : Sedlexing.lexbuf -> Lexing.position

val parse_warning : 
  ?out:out_channel ->
  ?head:string ->
  Lexing.position ->
  Lexing.position ->
  ('a, out_channel, unit, unit) format4 ->
  'a

val parse_error : 
  Lexing.position ->
  Lexing.position ->
  ('a, unit, string, Ast.node) format4 ->
  'a

val parse_error_loc : 
  Langs_common.Astloc.t ->
  ('a, unit, string, Ast.node) format4 ->
  'a

val parse_failure_loc : Verilog_parsing.Ast.Loc.t -> string -> 'a

val get_loc_for_lex : Sedlexing.lexbuf -> Verilog_parsing.Ast.Loc.t

val check_error : 
  < children : 'a list ; label : L.t ; loc : Langs_common.Astloc.t.. > as 'a ->
  unit

val lloc_of_poss : 
  Lexing.position ->
  Lexing.position ->
  Verilog_parsing.Ast.Layeredloc.c

val make_error_node : Lexing.position -> Lexing.position -> Ast.node

val register_vartype : Common.identifier -> unit

val register_class : Common.identifier -> unit

val register_type : Common.identifier -> unit

val register_package : Common.identifier -> unit

val register_property : Common.identifier -> unit

val register_covergroup : Common.identifier -> unit

val register_clocking : Common.identifier -> unit

val register_extern_method : Common.identifier -> unit

val register_interface : Common.identifier -> unit

val begin_package_scope : Common.identifier -> unit

val begin_class_scope : Common.identifier -> unit

val begin_function_scope : Common.identifier -> unit

val begin_scope : unit -> unit

val end_scope : unit -> unit

val import_one : Common.identifier -> Common.identifier -> unit

val import_any : Common.identifier -> unit

val lookup_identifier : Common.identifier -> identifier_attribute list

val set_vartype_type : unit -> unit

val reset_vartype : unit -> unit

val import_pkg_cls_scope : 
  (Common.identifier option * Common.identifier list) ->
  unit

val node_to_loc : 
  < lloc : < to_loc : ?cache:Fname.ext_cache_t option -> unit -> 'a.. >.. > ->
  'a

val node_to_lexposs : 
  < lloc : 
    < to_loc : 
      ?cache:Fname.ext_cache_t option ->
      unit ->
      Verilog_parsing.Ast.Loc.t.. >.. > ->
  Lexing.position * Lexing.position

package diffast-langs-verilog-parsing

Parameters

Signature