package hardcaml_xilinx_reports

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package hardcaml_xilinx_reports
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Source file hardcaml_xilinx_reports.ml

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(** Run Vivado and create a synthesis timing and utilization report for a design. *)

module Clock = Clock
module Command = Command
module Primitive_group = Primitive_group
module Project = Project
module Report = Report
module Wrap_with_registers = Wrap_with_registers