package hardcaml

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include Comb with type comb = Signal.t
type comb = Signal.t
type t = comb X.t
val sexp_of_t : t -> Ppx_sexp_conv_lib.Sexp.t
val widths : t -> Base.Int.t X.t

Actual bit widths of each field.

val assert_widths : t -> Base.Unit.t

Raise if the widths of t do not match those specified in the interface.

val of_int : Base.Int.t -> t

Each field is set to the constant integer value provided.

val of_ints : Base.Int.t X.t -> t

consts c sets each field to the integer value in c using the declared field bit width.

val const : Base.Int.t -> t
  • deprecated [since 2019-11] interface const
val consts : Base.Int.t X.t -> t
  • deprecated [since 2019-11] interface consts
val pack : ?rev:Base.Bool.t -> t -> comb

Pack interface into a vector.

val unpack : ?rev:Base.Bool.t -> comb -> t

Unpack interface from a vector.

val mux : comb -> t Base.List.t -> t

Multiplex a list of interfaces.

val mux2 : comb -> t -> t -> t
val concat : t Base.List.t -> t

Concatenate a list of interfaces.

val priority_select_with_default : ((comb, t) With_valid.t2 Base.List.t -> default:t -> t) Comb.optional_branching_factor
val wires : ?named:Base.Bool.t -> ?from:t -> Base.Unit.t -> t

Create a wire for each field. If named is true then wires are given the RTL field name. If from is provided the wire is attached to each given field in from.

val assign : t -> t -> Base.Unit.t
val (<==) : t -> t -> Base.Unit.t
val inputs : Base.Unit.t -> t

inputs t is wires () ~named:true.

val outputs : t -> t

outputs t is wires () ~from:t ~named:true.

val apply_names : ?prefix:Base.String.t -> ?suffix:Base.String.t -> ?naming_op:(comb -> Base.String.t -> comb) -> t -> t

Apply name to field of the interface. Add prefix and suffix if specified.

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