package hardcaml_xilinx_reports

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Project configuration.

type t = {
  1. vivado_utilization_report : Base.Bool.t;
    (*

    Generate a Vivado utilization report file

    *)
  2. vivado_timing_report : Base.Bool.t;
    (*

    Generate a Vivado timing report file

    *)
  3. primitive_groups : Primitive_group.t Base.List.t;
    (*

    Configure design utilization elements that should be queries and reported.

    *)
  4. blackbox : Hardcaml.Rtl.Blackbox.t;
    (*

    Blackbox mode.

    *)
  5. opt_design : Base.Bool.t Base.Option.t;
    (*

    Enable or disable the opt_design pass. If None then enabled automatically depending on the blackbox mode.

    *)
  6. report_hierarchy : Base.Bool.t;
    (*

    When extracting cells from the design to report utilization, search complete hierarchy if true, or just the top-level (current) instance when false. Must be set to true to find XPM (Xilinx parameterized macro) instances.

    *)
  7. retiming : Base.Bool.t;
    (*

    Enable retiming during synthesis. Improves timing but might affect resource usage. Enabled by default.

    *)
}
val sexp_of_t : t -> Sexplib0.Sexp.t
val default : t
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