package hardcaml_xilinx

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Module
Module type
Parameter
Class
Class type
val write_address_bits : Base.int

number of bits in the write address.

val read_address_bits : Base.int

number of bits in the read address.

val write_data_bits : Base.int

number of bits in the write bus.

val read_data_bits : Base.int

number of bits in the read bus.

module I : sig ... end
module O : sig ... end