hardcaml_verilator

Hardcaml Verilator Simulation Backend
README

Hardcaml_verilator converts Hardcaml designs to verilog and compiles
them with verilator. This
produces a very high performance, cycle accurate, simulation model of
the design.

The library transparently compiles the verilator simulation model to a
shared library and loads it into the running program. It exposes a
simulation API compatible with [Hardcaml.Cyclesim].

Compiling the verilator simulation model can take significant time -
therefore a simple caching scheme is implemented so that the shared
library can be reused on the second and subsequent runs if the design
does not change.

Install
Sources
hardcaml_verilator-v0.15.0.tar.gz
sha256=df11a0aaed172de8c2166468066971c53128035eed8c5a743ba4b87fa3e62027
Dependencies
dune
>= "2.0.0"
ctypes
>= "0.18.0"
ppx_jane
>= "v0.15" & < "v0.16"
ppx_deriving_hardcaml
>= "v0.15" & < "v0.16"
hardcaml
>= "v0.15" & < "v0.16"
core_unix
>= "v0.15" & < "v0.16"
core
>= "v0.15" & < "v0.16"
ocaml
>= "4.08.0"
Reverse Dependencies