package hardcaml_step_testbench

You can search for identifiers within the package.

in-package search v0.2.0

hardcaml_step_testbench
- Hardcaml_step_testbench
  - Before_and_after_edge
  - Make
    
    Array
    
    I
    
    All
    
    M
    
    Let_syntax
    
    Let_syntax
    
    Open_on_rhs
    
    Monad_infix
    
    Comb
    
    Make_comb
    
    Comb
    
    Signed
    
    Sop
    
    TypedMath
    
    Unsigned
    
    Uop
    
    Names_and_widths
    
    Of_always
    
    Of_bits
    
    Of_signal
    
    Unsafe_assoc_by_port_name
    
    I_data
    
    Let_syntax
    
    Let_syntax
    
    Open_on_rhs
    
    List
    
    Monad_infix
    
    O
    
    All
    
    M
    
    Let_syntax
    
    Let_syntax
    
    Open_on_rhs
    
    Monad_infix
    
    Comb
    
    Make_comb
    
    Comb
    
    Signed
    
    Sop
    
    TypedMath
    
    Unsigned
    
    Uop
    
    Names_and_widths
    
    Of_always
    
    Of_bits
    
    Of_signal
    
    Unsafe_assoc_by_port_name
    
    O_data
    
    Simulator
  - S
    
    Array
    
    I
    
    All
    
    M
    
    Let_syntax
    
    Let_syntax
    
    Open_on_rhs
    
    Monad_infix
    
    Comb
    
    Make_comb
    
    Comb
    
    Signed
    
    Sop
    
    TypedMath
    
    Unsigned
    
    Uop
    
    Names_and_widths
    
    Of_always
    
    Of_bits
    
    Of_signal
    
    Unsafe_assoc_by_port_name
    
    I_data
    
    Let_syntax
    
    Let_syntax
    
    Open_on_rhs
    
    List
    
    Monad_infix
    
    O
    
    All
    
    M
    
    Let_syntax
    
    Let_syntax
    
    Open_on_rhs
    
    Monad_infix
    
    Comb
    
    Make_comb
    
    Comb
    
    Signed
    
    Sop
    
    TypedMath
    
    Unsigned
    
    Uop
    
    Names_and_widths
    
    Of_always
    
    Of_bits
    
    Of_signal
    
    Unsafe_assoc_by_port_name
    
    O_data
    
    Simulator
hardcaml_step_testbench.digital_components
- Digital_components
  - Component
    
    Combinational
    
    S
    
    Input
    
    Output
    
    Flip_flop_with_load_enable
    
    Input
    
    Flip_flop_with_load_enable_and_reset
    
    Input
    
    Next_input
    
    S
    
    Input
    
    Output
  - Data
    
    Bool
    
    Int
    
    Pair
    
    D1
    
    D2
    
    S
    
    String
    
    Unit
  - Step_monad
    
    Component_finished
    
    Event
    
    Let_syntax
    
    Let_syntax
    
    Open_on_rhs
    
    Monad_infix

Legend:
Library
Module
Module type
Parameter
Class
Class type

A simulator for the design being tested.

type t = Hardcaml.Cyclesim.With_interface(I)(O).t

val sexp_of_t : t -> Sexplib0.Sexp.t