package hardcaml_circuits

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package hardcaml_circuits
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Module Hardcaml_circuitsSource

Sourcemodule Arbiters : sig ... end

Arbiter circuits. Given a set of requesters the arbiter chooses one to succeed.

Sourcemodule Cordic : sig ... end

Coordinate rotation digital computer.

Sourcemodule Cordic_reference : sig ... end

Reference implementation of the CORDIC algorithm using Float.t.

Sourcemodule Cordic_special_functions : sig ... end

CORDIC implementations of various different functions.

Sourcemodule Fast_fifo : sig ... end

Low latency combinational fifo. See create for documentation.

Sourcemodule Index_vec : sig ... end
Sourcemodule Lfsr : sig ... end

Linear feedback shift registers

Sourcemodule Modulo : sig ... end

Calculate x % y where x >= 0 and y > 0.

Sourcemodule Mul : sig ... end

Wallace/Dadda tree multipliers.

Sourcemodule Onehot_clean : sig ... end

Convert an arbitrary input vector to onehot. The first bit set scanning from either the lsb or msb will be set in the output and all others will be 0. The architecture has logarithmic delay.

Sourcemodule Pipelined_adder : sig ... end

Pipelined adder architectures for very wide adders.

Sourcemodule Pipelined_incrementer : sig ... end

Simple pipelined incrementer.

Sourcemodule Pipelined_tree_reduce : sig ... end

Pipelined tree reduce operation, with propogation delay equivalent to ceil(log(|args|))

Sourcemodule Pipelined_tree_mux : sig ... end
Sourcemodule Prefix_sum : sig ... end

Parallel prefix networks. See https://en.wikipedia.org/wiki/Prefix_sum.

Sourcemodule Rac : sig ... end

ROM-accumulator.

Sourcemodule Sorting_network : sig ... end

Sorting networks.

Sourcemodule Stages : sig ... end

Represents a computation broken into multiple stages. Each stage is returned in an array.

Sourcemodule Vec : sig ... end

A simple vector structure with insert and delete operations at arbitrary positions.