Module `Voqc.Main`

Main entry point for VOQC.

Overview

VOQC contains utilities for optimizing quantum circuits and mapping them to a connectivity graph. VOQC was first presented at POPL 2021. The extended version of the paper is available here. In the remainder of this document we will refer to this paper as "POPL VOQC".

This file lists the functions we provide in VOQC, as well as properties we have verified about them. In general, our goal is to prove that VOQC circuit transformations are semantics preserving, meaning that the behavior of a circuit (its "semantics") does not change after our transformations are applied. The semantics of a unitary circuit over d qubits is a 2^d x 2^d unitary matrix, so proving semantics-preservation requires showing that two (symbolic) matrices are equal. Sometimes we also show that the output of a transformation has a particular property, such as using a particular gate set.

In the remainder of this document, we will use the following shorthand for properties proved:

Preserves semantics -- The semantics-preservation property is written in Coq as forall (c : circ), [[opt c]] = [[c]] for optimization opt. In our development, we support several variations on semantics-preservation:
- (WT) -- We include the annotation (WT) to indicate that a transformation preserves semantics provided that the input circuit is well-typed. A circuit is "well-typed" for some dimension (i.e. number of qubits) d if every gate in the circuit applies to some qubit less than d and no gate has duplicate arguments. Some optimizations do not preserve semantics when the input is ill-typed because they can produce a well-typed circuit from an ill-typed input. In Coq, this requirement is written as forall c, well_typed c -> [[opt c]] = [[c]].
- (phase) -- We include the annotation (phase) to indicate that the semantics are preserved up to a global phase. The unitary matrices X and e^(ix)X have the same action on all input states, and can thus be considered equivalent. However, this definition of equivalence is not compositional in the sense that the controlled versions of these matrices are not equivalent (because the phase is no longer global). In Coq, this restriction is written as forall c, exists x, [[opt c]] = e^(ix) [[c]].
- (perm) -- We include the annotation (perm) to indicate that the semantics are preserved up to a permutation of qubits. This will be the case after applying circuit mapping. In Coq, for permutation matrices P1 and P2, this variation is written as forall c, [[c]] = P1 x [[opt c]] x P2.
Preserves WT -- This property says that if the input circuit is well-typed, then the output circuit will also be well-typed. In our semantics, the denotation of a well-typed circuit is a unitary matrix while the denotation of an ill-typed circuit is the zero matrix, so all of the variations on semantics-preservation actually imply WT-preservation.
Preserves mapping -- This property says that, for any connectivity graph G, if the input circuit respects the constraints in G then the output circuit also respects the constraints in G. This property allows us to apply optimizations after mapping, preserving our guarantee that the output program satisfies hardware constraints.
Uses gates {g1, ..., gn} -- This property says that every operation in the circuit is an application of one of {g1, ..., gn}.
Respects constraints G -- This property says that every two-qubit interaction in the circuit is allowed by the connectivity graph G.

Types

type circ =
  StandardGateSet.StandardGateSet.coq_Std_Unitary
    UnitaryListRepresentation.gate_list

The circ type is a list of gates from the standard gate set.

type gate_counts =

| BuildCounts of int * int * int * int * int * int * int * int * int * int * int * int * int * int * int * int * int * int * int * int * int

gate_counts is the return type for count_gates. It stores the count of each gate type in the following order: { I, X, Y, Z, H, S, T, Sdg, Tdg, Rx, Ry, Rz, Rz, U1, U2, U3, CX, CZ , SWAP, CCX, CCZ }.

type layout

A layout describes a mapping from logical to physical qubits. For an architecture with n qubits, a layout should be a bijection on integers {0, ..., n-1}. Under the hood, layout is a pair of functions (nat -> nat) * (nat -> nat) that maps logical qubits to physical qubits and physical qubits back to logical qubits. A layout is well-formed if these two functions accurately represent a bijection and its inverse.

You can construct a layout using the function list_to_layout.

type c_graph

A connectivity graph (c_graph) is a triple nat * (nat -> nat -> list nat) * (nat -> nat -> bool), which consists of the total number of qubits in the system, a function to generate an undirected path between any two qubits, and an oracle that indicates whether a directed edge exists between two qubits. A connectivity graph is well-formed if the function to get paths returns a valid path between any two qubits in the system.

You can construct a connectivity graph using make_tenerife, make_lnn, make_lnn_ring, or make_grid.

API

Utility Functions

val check_well_typed : circ -> int -> bool

Check if a circuit is well-typed with the given number of qubits (i.e. every gate is applied to qubits within range and never applied to duplicates).

val convert_to_ibm : circ -> circ

Restrict a program to use gates in the IBM gate set (this may be done implicitly when calling certain optimizations).

Verified Properties: preserves semantics, preserves WT, preserves mapping, uses gates {U1, U2, U3, CX}

val convert_to_rzq : circ -> circ

Restrict a circuit to use gates in the RzQ gate set (this may be done implicitly when calling certain optimizations).

Verified properties: preserves semantics (phase), preserves WT, preserves mapping, uses gates {H, X, Rzq, CX}

val replace_rzq : circ -> circ

Replace the (non-standard) Rzq gate with its equivalent Rz, Z, T, S, Tdg, or Sdg gate.

Verified Properties: preserves semantics, preserves WT, preserves mapping, uses any gate in the standard set except Rzq

val decompose_to_cnot : circ -> circ

Decompose CZ, SWAP, CCX, and CCZ gates so that the only multi-qubit gate is CX (also called "CNOT").

Verified Properties: preserves semantics, preserves WT, uses any gate in the standard set except {CZ, SWAP, CCX, CCZ}

val count_gates : circ -> gate_counts

Count all types of gates in the program. Note that this count is syntactic in the sense that gates like Rz, Rzq, and U1 are counted separately even though they all could be considered a U1 gate. Similarly, the count for X does not include gates of the form U3(PI,0,PI), even though this is functionally the same.

val total_gate_count : circ -> int

Count the total number of gates (i.e. length of the instruction list).

val count_clifford_rzq : circ -> int

Count the Rzq gates parameterized by a multiple of PI/2 (i.e. "Clifford" Rz gates).

val scale_count : gate_counts -> int -> gate_counts

Multiply all gate counts by a factor n.

val add_counts : gate_counts -> gate_counts -> gate_counts

Add gate counts.

val count_gates_lcr : ((circ * circ) * circ) -> int -> gate_counts

Compute the gates required for n iterations of the input LCR decomposition (see optimize_nam_lcr).

Optimization Functions

val optimize_1q_gates : circ -> circ

Implementation of Qiskit's Optimize1qGates routine, which merges adjacent 1-qubit gates. Internally uses the IBM gate set.