package hardcaml_step_testbench

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package hardcaml_step_testbench
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Module
Module type
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Class
Class type
type t = Logic.t
val sexp_of_t : t -> Sexplib0.Sexp.t
val equal : t -> t -> bool
val empty : t
val is_empty : t -> Base.bool
val (--) : t -> Base.string -> t
val width : t -> Base.int
val address_bits_for : Base.int -> Base.int
val num_bits_to_represent : Base.int -> Base.int
val of_constant : Hardcaml.Constant.t -> t
val to_constant : t -> Hardcaml.Constant.t
val of_bit_string : Base.string -> t
val of_int : width:Base.int -> Base.int -> t
val of_int32 : width:Base.int -> Base.int32 -> t
val of_int64 : width:Base.int -> Base.int64 -> t
val of_hex : ?signedness:Hardcaml.Signedness.t -> width:Base.int -> Base.string -> t
val of_octal : ?signedness:Hardcaml.Signedness.t -> width:Base.int -> Base.string -> t
val of_z : width:Base.int -> Z.t -> t
val of_string : Base.string -> t
val of_bit_list : Base.int Base.list -> t
val of_decimal_string : width:Base.int -> Base.string -> t
val of_char : Base.char -> t
val of_bool : Base.bool -> t
val to_z : t -> signedness:Hardcaml.Signedness.t -> Z.t
val concat_msb : t Base.list -> t
val concat_lsb : t Base.list -> t
val concat_msb_e : t Base.list -> t
val concat_lsb_e : t Base.list -> t
val (@:) : t -> t -> t
val vdd : t
val is_vdd : t -> Base.bool
val gnd : t
val is_gnd : t -> Base.bool
val zero : Base.int -> t
val ones : Base.int -> t
val one : Base.int -> t
val select : t -> Base.int -> Base.int -> t
val select_e : t -> Base.int -> Base.int -> t
val bit : t -> Base.int -> t
val msb : t -> t
val lsbs : t -> t
val lsb : t -> t
val msbs : t -> t
val drop_bottom : t -> Base.int -> t
val drop_top : t -> Base.int -> t
val sel_bottom : t -> Base.int -> t
val sel_top : t -> Base.int -> t
val (.:[]) : t -> (Base.int * Base.int) -> t
val (.:+[]) : t -> (Base.int * Base.int Base.option) -> t
val (.:-[]) : t -> (Base.int Base.option * Base.int) -> t
val (.:()) : t -> Base.int -> t
val insert : into:t -> t -> at_offset:Base.int -> t
val mux : t -> t Base.list -> t
val mux2 : t -> t -> t -> t
val mux_init : t -> Base.int -> f:(Base.int -> t) -> t
val (&:) : t -> t -> t
val (&:.) : t -> Base.int -> t
val (&&:) : t -> t -> t
val (|:) : t -> t -> t
val (|:.) : t -> Base.int -> t
val (||:) : t -> t -> t
val (^:) : t -> t -> t
val (^:.) : t -> Base.int -> t
val (~:) : t -> t
val (+:) : t -> t -> t
val (+:.) : t -> Base.int -> t
val (-:) : t -> t -> t
val (-:.) : t -> Base.int -> t
val negate : t -> t
val (*:) : t -> t -> t
val (*+) : t -> t -> t
val (==:) : t -> t -> t
val (==:.) : t -> Base.int -> t
val (<>:) : t -> t -> t
val (<>:.) : t -> Base.int -> t
val (<:) : t -> t -> t
val (<:.) : t -> Base.int -> t
val lt : t -> t -> t
val (>:) : t -> t -> t
val (>:.) : t -> Base.int -> t
val (<=:) : t -> t -> t
val (<=:.) : t -> Base.int -> t
val (>=:) : t -> t -> t
val (>=:.) : t -> Base.int -> t
val (<+) : t -> t -> t
val (<+.) : t -> Base.int -> t
val (>+) : t -> t -> t
val (>+.) : t -> Base.int -> t
val (<=+) : t -> t -> t
val (<=+.) : t -> Base.int -> t
val (>=+) : t -> t -> t
val (>=+.) : t -> Base.int -> t
val (-->:) : t -> t -> t
val to_string : t -> Base.string
val to_int : t -> Base.int
val to_sint : t -> Base.int
val to_int32 : t -> Base.int32
val to_sint32 : t -> Base.int32
val to_int64 : t -> Base.int64
val to_sint64 : t -> Base.int64
val to_bool : t -> Base.bool
val to_char : t -> Base.char
val to_bstr : t -> Base.string
val bits_msb : t -> t Base.list
val bits_lsb : t -> t Base.list
val to_array : t -> t Base.array
val of_array : t Base.array -> t
val repeat : t -> Base.int -> t
val split_in_half_msb : ?msbs:Base.int -> t -> t * t
val split_in_half_lsb : ?lsbs:Base.int -> t -> t * t
val split_lsb : ?exact:Base.bool -> part_width:Base.int -> t -> t Base.list
val split_msb : ?exact:Base.bool -> part_width:Base.int -> t -> t Base.list
val bswap : t -> t
val sll : t -> Base.int -> t
val srl : t -> Base.int -> t
val sra : t -> Base.int -> t
val rotl : t -> Base.int -> t
val rotr : t -> Base.int -> t
val log_shift : (t -> Base.int -> t) -> t -> t -> t
val uresize : t -> Base.int -> t
val sresize : t -> Base.int -> t
val ue : t -> t
val se : t -> t
val resize_list : resize:(t -> Base.int -> t) -> t Base.list -> t Base.list
val resize_op2 : resize:(t -> Base.int -> t) -> (t -> t -> t) -> t -> t -> t
val reduce : f:('a -> 'a -> 'a) -> 'a Base.list -> 'a
val reverse : t -> t
val mod_counter : max:Base.int -> t -> t
val compute_arity : steps:Base.int -> Base.int -> Base.int
val compute_tree_branches : steps:Base.int -> Base.int -> Base.int Base.list
val tree : arity:Base.int -> f:('a Base.list -> 'a) -> 'a Base.list -> 'a
val priority_select : ?branching_factor:Base.int -> (t, t) Hardcaml__Comb_intf.with_valid2 Base.list -> (t, t) Hardcaml__Comb_intf.with_valid2
val priority_select_with_default : ?branching_factor:Base.int -> (t, t) Hardcaml__Comb_intf.with_valid2 Base.list -> default:t -> t
val onehot_select : ?branching_factor:Base.int -> (t, t) Hardcaml__Comb_intf.with_valid2 Base.list -> t
val popcount : ?branching_factor:Base.int -> t -> t
val is_pow2 : ?branching_factor:Base.int -> t -> t
val leading_ones : ?branching_factor:Base.int -> t -> t
val trailing_ones : ?branching_factor:Base.int -> t -> t
val leading_zeros : ?branching_factor:Base.int -> t -> t
val trailing_zeros : ?branching_factor:Base.int -> t -> t
val floor_log2 : ?branching_factor:Base.int -> t -> (t, t) Hardcaml__Comb_intf.with_valid2
val ceil_log2 : ?branching_factor:Base.int -> t -> (t, t) Hardcaml__Comb_intf.with_valid2
val binary_to_onehot : t -> t
val onehot_to_binary : t -> t
val binary_to_gray : t -> t
val gray_to_binary : t -> t
val random : width:Base.int -> t
module type Typed_math = sig ... end
module Unsigned : sig ... end
module Signed : sig ... end
module Uop : sig ... end
module Sop : sig ... end
val to_bits_exn : t -> Hardcaml.Bits.t
val of_bits : Hardcaml.Bits.t -> t
val compare : t -> t -> int
val create_signal : ?initial_value:t -> ?resolution:[ `Resolved | `Unresolved ] -> int -> t Event_driven_sim.Simulator.Signal.t
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