package hardcaml
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doc/hardcaml/Hardcaml/Signal_graph/index.html
Module Hardcaml.Signal_graphSource
A Signal_graph.t is a created from a list of signals, and defined by tracing back to inputs (unassigned wires or constants). Functions are provided for traversing the graph.
When traversing using depth_first_seach we can specify upto which means the search will stop when it reaches any signal in the given list (which is also /not/ included as part of the search).
Create a Signal_graph.t from a list of signals (commonly, circuit outputs).
Traverse the graph and find all inputs. Badly formed inputs (no name, or multiple names) return an error.
Return the outputs of the signal graph. If validate is true, then the outputs are checked for compatibility with circuit outputs.
val depth_first_search :
?deps:(module Signal.Type.Deps) ->
?f_before:('a -> Signal.t -> 'a) ->
?f_after:('a -> Signal.t -> 'a) ->
t ->
init:'a ->
'aVisit all signals in the graph, starting at the outputs, in a depth-first manner. Each signal is visited only once. f_before is called before recursing on each signal's fan-in. Similiarly, f_after is called after recursing on the fan-in.
If deps is provided it will be used to compute signal dependencies rather than the default definition. This is useful for terminating traversals based on some condition on signals, e.g., if it's a register or a memory.
Fold across all signals in the graph, starting at the outputs. Each signal is visited only once.
Return a list of all signals in the graph for whom f signal returns true.
Retuns an error if the graph has a combinational loop, that is, a path from a signal back to itself that doesn't pass though a register, memory or instantiation.
normalize_uids t creates a copy of t that is identical to t except the uids are numbered starting at 1.
Fan-out of each signal in the signal graph. The fan-out of a signal is the set of signals it drives.
Fan-in of each signal in the signal graph. The fan-in of a signal is the set of signals that drive it.
val topological_sort :
deps:(module Signal.Type.Deps) ->
t ->
(Signal.t Base.list, Signal.t Base.list) Base.Result.ttopological_sort t sorts the signals in t so that all the signals in deps s occur before s.
Signal dependencies used for simulation scheduling. Breaks loops through sequential elements like registers and memories.
Like Deps_for_simulation_scheduling, except loops are allowed through instantiations.
val last_layer_of_nodes :
is_input:(Signal.t -> Base.bool) ->
t ->
Signal.Type.Uid.t Base.List.tFinal layer of combinational nodes which sit on the path between the outputs and any driving register or memory.