package lrgrep
Install
dune-project
Dependency
Authors
Maintainers
Sources
sha256=e53de12e4c5cbe6bca00643593266b4f9fa2e3f6a138195eeff7a4329f5c1c75
sha512=7fd7c4d11506fea7cc11c9bbf5aea9142d905643553c0c90e1bb16b794106b0c14a266acf89ae91b6929008dc0ba6515f788642873e2e4ba6c3d49bd45d25127
doc/kernel/Kernel/Automata/Machine/index.html
Module Automata.MachineSource
type ('g, 'r) label = {filter : 'g Info.lr1 Utils.Misc.indexset;(*The set of LR(1) states that allow this transition to be taken.
*)captures : (Regexp.Capture.t * Lrgrep_support.Register.t) list;(*Variables to capture and the register in which to store them when the transition is taken.
*)clear : Lrgrep_support.Register.set;(*Registers to clear when the transition is taken (for captures that go out of scope or are undefined).
*)moves : Lrgrep_support.Register.t Lrgrep_support.Register.map;(*Register-to-register transfers when taking this transition. Keys are source registers, values are target registers.
*)priority : (('g, 'r) Spec.branch Fix.Indexing.index * priority * priority) list;(*Dynamic priority remappings for clause precedence. An element (c, p1, p2) means that a match of clause
*)cat priorityp1in the source state corresponds to a match at priorityp2in the target state.
}Bytecode representation of the automaton for code generation.
The machine is a sparse transition table with a register transfer language. Transitions carry labels with filters, captures, register moves, clears, and dynamic priority remappings.
type ('g, 'r, 'st, 'tr) t = {initial : 'st Fix.Indexing.index option;(*Index of the initial state, or
*)Noneif there are no viable patterns.source : ('tr, 'st Fix.Indexing.index) Fix.Indexing.vector;(*For each transition, the source state index.
*)target : ('tr, 'st Fix.Indexing.index) Fix.Indexing.vector;(*For each transition, the target state index.
*)label : ('tr, ('g, 'r) label) Fix.Indexing.vector;(*For each transition, its label (filter, captures, moves, clear, priority).
*)unhandled : ('st, 'g Info.lr1 Utils.Misc.indexset) Fix.Indexing.vector;(*For each state, the set of LR(1) states for which stacks can reach this state but no transition is defined. These should be rejected at runtime.
*)outgoing : ('st, 'tr Utils.Misc.indexset) Fix.Indexing.vector;(*For each state, the set of outgoing transition indices.
*)accepting : ('st, (('g, 'r) Spec.branch Fix.Indexing.index * priority * Lrgrep_support.Register.t Regexp.Capture.map) list) Fix.Indexing.vector;(*For each state, the list of clauses accepted when reaching that state. Each clause comes with a priority level and a register mapping indicating where captured variables can be found. The first matching clause wins.
*)branches : ('st, (('g, 'r) Spec.branch Fix.Indexing.index * bool * Lrgrep_support.Register.t Regexp.Capture.map) list) Fix.Indexing.vector;(*For each state, the list of clauses being recognized in that state. Each entry is (branch index, is_accepting, register mapping).
*)register_count : int;(*Total number of registers used across all states.
*)partial_captures : Regexp.Capture.set;(*Set of captures that may be only partially defined (some paths define them, others don't).
*)
}The machine representation for code generation.
A sparse transition table with register transfer operations. Parameterized by:
'gis the grammar (input)'ris the set of rules (input)'stis the set of states (output)'tris the set of transitions (output)
val minimize :
('g, 'r) Spec.branches ->
('g, 'r, 'dfa) DFA.t ->
('g, 'r, 'dfa) Dataflow.t ->
('g, 'r) _tMinimize the DFA and produce the final machine representation.
Converts the DFA with dataflow analysis results into a compact machine with sparse transition tables and register transfer language. Uses a refinement of Valmari's algorithm with custom decomposition:
- States are refined by accepted actions (clauses and priorities)
- Transitions are grouped by LR(1) filter and by register operations Returns
Nonefor the initial state if no patterns are viable.