package hardcaml_xilinx_reports
Module Project.ConfigSource
Project configuration.
Source
type t = {vivado_utilization_report : Base.Bool.t;(*Generate a Vivado utilization report file
*)vivado_timing_report : Base.Bool.t;(*Generate a Vivado timing report file
*)primitive_groups : Primitive_group.t Base.List.t;(*Configure design utilization elements that should be queries and reported.
*)blackbox : Hardcaml.Rtl.Blackbox.t;(*Blackbox mode.
*)opt_design : Base.Bool.t Base.Option.t;(*Enable or disable the
*)opt_designpass. IfNonethen enabled automatically depending on the blackbox mode.report_hierarchy : Base.Bool.t;(*When extracting cells from the design to report utilization, search complete hierarchy if true, or just the top-level (current) instance when false. Must be set to true to find XPM (Xilinx parameterized macro) instances.
*)retiming : Base.Bool.t;(*Enable retiming during synthesis. Improves timing but might affect resource usage. Enabled by default.
*)
}