package diffast-langs-verilog

  1. Overview
  2. Docs
Verilog parser plugin for Diff/AST

Install 

dune-project
 Dependency

github.com Readme Edit opam file Versions (5)

Authors

  1. C
    Codinuum <codinuum@me.com>
  2. M
    Masatomo Hashimoto <m.hashimoto@stair.center>

Maintainers

  1. C
    Codinuum <codinuum@me.com>
  2. M
    Masatomo Hashimoto <m.hashimoto@stair.center>

Sources

v0.4.tar.gz
sha256=f58dc5326c1698e22b84e3b808e6008228071f5796cda65433106e0d42c0dad5
sha512=8e451ab99433ef479c7d3aa0396bab6650894a2c3282e72cc65014d61f59dde578020d4bc9d423045e66d1d4592b58e877d7bd830788aeb96e5fa4ba534b4b78

doc/diffast-langs-verilog.base/Verilog_base/V_label/Expression/index.html

Module V_label.ExpressionSource

include module type of struct include Ls.Expression end
Sourcetype t = Verilog_parsing.Labels.Expression.t =
  1. | IntegralNumber of string
  2. | RealNumber of string
  3. | TimeNumber of string
  4. | Null
  5. | UOp of Verilog_parsing.Labels.UnaryOperator.t
  6. | BOp of Verilog_parsing.Labels.BinaryOperator.t
  7. | Cond
  8. | Paren
  9. | Tagged of Verilog_parsing.Common.identifier
  10. | Inside
  11. | Concat
  12. | EmptyQueue
  13. | Last
  14. | MinTypeMax
  15. | Cast
  16. | Constraint
  17. | ConstraintIf
  18. | ConstraintForeach
  19. | ConstraintSet
  20. | Stream
  21. | PreIncr
  22. | PreDecr
  23. | PostIncr
  24. | PostDecr
  25. | OperatorAssignment of Verilog_parsing.Labels.AssignmentOperator.t
  26. | SystemFCall of Verilog_parsing.Common.identifier
  27. | SystemTCall of Verilog_parsing.Labels.SystemTask.t
  28. | TfCall of Verilog_parsing.Common.identifier
  29. | MethodCall of Verilog_parsing.Common.identifier
  30. | ArrayMethodCallUnique
  31. | ArrayMethodCallAnd
  32. | ArrayMethodCallOr
  33. | ArrayMethodCallXor
  34. | CycleDelayConstRange
  35. | ConstantRange
  36. | ClassNew
  37. | ClassNewA
Sourceval to_string : t -> string
Sourceval to_simple_string : t -> Verilog_parsing.Common.identifier
Sourceval get_value : t -> string
Sourceval to_tag : t -> string * (string * Verilog_parsing.Common.identifier) list
Sourceval anonymize : t -> t
Sourceval to_short_string : ?ignore_identifiers_flag:??? -> t -> string